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 PD - 97377
IRFB3004PbF IRFS3004PbF IRFSL3004PBF
Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits
G D
HEXFET(R) Power MOSFET
Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free
VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited)
D D
40V 1.4m 1.75m 340Ac 195A
S
D
G
D
S G
S G
D
S
TO-220AB IRFB3004PbF
D2Pak IRFS3004PbF
TO-262 IRFSL3004PBF
G
D
S
Gate
Drain
Max.
340c 240c 195 1310 380 2.5 20 4.4 -55 to + 175 300 10lbfxin (1.1Nxm) 300 See Fig. 14, 15, 22a, 22b
Source
Units
A
Absolute Maximum Ratings
Symbol
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS dv/dt TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Wire Bond Limited) Pulsed Drain Current d Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery f Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw
W W/C V V/ns C
Avalanche Characteristics
EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy e Avalanche Current d Repetitive Avalanche Energy d mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA RJA
Parameter
Junction-to-Case kl Case-to-Sink, Flat Greased Surface, TO-220 Junction-to-Ambient, TO-220 Junction-to-Ambient (PCB Mount) , D Pak j
2
Typ.
--- 0.50 --- ---
Max.
0.40 --- 62 40
Units
C/W
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1
02/26/09
IRFB/S/SL3004PbF
Static @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
Min. Typ. Max. Units
40 --- --- 2.0 --- --- --- --- --- --- --- 0.037 --- 1.4 1.75 --- 4.0 --- 20 --- 250 --- 100 --- -100 2.2 ---
Conditions
V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 5mAd m VGS = 10V, ID = 195A g V VDS = VGS, ID = 250A A VDS = 40V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125C nA VGS = 20V VGS = -20V
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) i Effective Output Capacitance (Time Related)h
Min. Typ. Max. Units
1170 --- --- --- --- --- --- --- --- --- --- --- --- --- --- 160 40 68 92 23 220 90 130 9200 2020 1340 2440 2690 --- 240 --- --- --- --- --- --- --- --- --- --- --- --- S nC
Conditions
VDS = 10V, ID = 195A ID = 187A VDS =20V VGS = 10V g ID = 187A, VDS =0V, VGS = 10V VDD = 26V ID = 195A RG = 2.7 VGS = 10V g VGS = 0V VDS = 25V = 1.0 MHz, See Fig. 5 VGS = 0V, VDS = 0V to 32V i, See Fig. 11 VGS = 0V, VDS = 0V to 32V h
ns
pF
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) d Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- 340c --- 1310 A A
Conditions
MOSFET symbol showing the integral reverse
G S D
--- --- 1.3 V --- 27 --- ns --- 31 --- --- 18 --- nC TJ = 125C --- 41 --- --- 1.2 --- A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode. TJ = 25C, IS = 195A, VGS = 0V g TJ = 25C VR = 34V, TJ = 125C IF = 195A di/dt = 100A/s g TJ = 25C
Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140) Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.016mH RG = 25, IAS = 195A, VGS =10V. Part not recommended for use above this value .
ISD 195A, di/dt 930A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as When mounted on 1" square PCB (FR-4 or G-10 Material). For recom R is measured at TJ approximately 90C. RJC value shown is at time zero.
Coss while VDS is rising from 0 to 80% VDSS. mended footprint and soldering techniques refer to application note #AN-994.
2
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IRFB/S/SL3004PbF
10000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 4.8V 4.5V
10000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 4.8V 4.5V
ID, Drain-to-Source Current (A)
1000
BOTTOM
ID, Drain-to-Source Current (A)
1000
BOTTOM
4.5V
100
4.5V
100
60s PULSE WIDTH
Tj = 25C 10 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) 10 0.1 1
60s PULSE WIDTH
Tj = 175C 10 100
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1000
Fig 2. Typical Output Characteristics
2.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current (A)
ID = 195A VGS = 10V
100 T J = 175C 10 T J = 25C
1.5
1.0
1 VDS = 25V 60s PULSE WIDTH 1 2 3 4 5 6 7 8
0.1
0.5 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (C)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
100000
VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = C gd Coss = Cds + Cgd
Fig 4. Normalized On-Resistance vs. Temperature
14.0 ID= 187A
VGS, Gate-to-Source Voltage (V)
12.0 10.0 8.0 6.0 4.0 2.0 0.0 VDS= 32V VDS= 20V
C, Capacitance (pF)
10000
Ciss Coss Crss
1000
100 1 10 VDS, Drain-to-Source Voltage (V) 100
0
50
100
150
200
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFB/S/SL3004PbF
1000 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) 1000 100sec 1msec 100 10msec 10 DC Tc = 25C Tj = 175C Single Pulse 1 0.0 0.5 1.0 1.5 2.0 1 10 VDS, Drain-to-Source Voltage (V) 100 VSD, Source-to-Drain Voltage (V)
100
T J = 175C
10
T J = 25C
1 VGS = 0V 0.1
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
350 300
ID, Drain Current (A)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
50 Id = 5mA 48
Limited By Package
250 200 150 100 50 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
46
44
42
40 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Temperature ( C )
Fig 9. Maximum Drain Current vs. Case Temperature
2.0 1.8 1.6 1.4
Energy (J)
Fig 10. Drain-to-Source Breakdown Voltage
1400
EAS , Single Pulse Avalanche Energy (mJ)
1200 1000 800 600 400 200 0
ID TOP 30A 54A BOTTOM 195A
1.2 1.0 0.8 0.6 0.4 0.2 0.0 -5 0 5 10 15 20 25 30 35 40 45
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (C)
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4
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IRFB/S/SL3004PbF
1
Thermal Response ( Z thJC ) C/W
D = 0.50 0.1 0.20 0.10 0.05 0.01 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 0.0001 0.001
J J 1 R1 R1 2 R2 R2 R3 R3 3 R4 R4 C 2 3 4 4
Ri (C/W)
0.00646 0.10020 0.18747 0.10667
0.000005 0.000124 0.001374 0.008465
i (sec)
1
Ci= i/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.01 0.1
0.001 1E-006
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01 0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse)
10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01
Fig 14. Typical Avalanche Current vs.Pulsewidth
320 280
EAR , Avalanche Energy (mJ)
240 200 160 120 80 40 0 25 50
TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 195A
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
75
100
125
150
175
Starting T J , Junction Temperature (C)
PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFB/S/SL3004PbF
4.5
VGS(th) , Gate threshold Voltage (V)
10 9 8 7 6 5 4 3
-75 -50 -25 0 25 50 75 100 125 150 175 200
4.0 3.5
IF = 78A V R = 34V TJ = 25C TJ = 125C
2.5 2.0 1.5 1.0
ID = 250A ID = 1.0A
ID = 1.0mA
IRRM (A)
3.0
2 100 200 300 diF /dt (A/s) 400 500
T J , Temperature ( C )
Fig 16. Threshold Voltage vs. Temperature
11 10 9 8
IRRM (A)
Fig. 17 - Typical Recovery Current vs. dif/dt
350 IF = 78A V R = 34V TJ = 25C TJ = 125C
IF = 117A V R = 34V TJ = 25C TJ = 125C
QRR (nC)
300 250 200 150 100 50
7 6 5 4 3 2 1 100 200 300 diF /dt (A/s) 400 500
100
200
300 diF /dt (A/s)
400
500
Fig. 18 - Typical Recovery Current vs. dif/dt
400 350 300
QRR (nC)
Fig. 19 - Typical Stored Charge vs. dif/dt
IF = 117A V R = 34V TJ = 25C TJ = 125C
250 200 150 100 50 0
100
200
300 diF /dt (A/s)
400
500
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRFB/S/SL3004PbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
V(BR)DSS
15V
tp
DRIVER
VDS
L
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
I AS
Fig 22a. Unclamped Inductive Test Circuit
VDS VGS RG RD
Fig 22b. Unclamped Inductive Waveforms
VDS 90%
D.U.T.
+
- VDD
V10V GS
Pulse Width 1 s Duty Factor 0.1 %
10% VGS
td(on) tr t d(off) tf
Fig 23a. Switching Time Test Circuit
Current Regulator Same Type as D.U.T.
Fig 23b. Switching Time Waveforms
Id Vds Vgs
50K 12V .2F .3F
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
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Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
7
IRFB/S/SL3004PbF
Dimensions are shown in millimeters (inches)
TO-220AB Package Outline
TO-220AB Part Marking Information
(;$03/( 7+,6 ,6 $1 ,5) /27 &2'( $66(0%/(' 21 :: ,1 7+( $66(0%/< /,1( & 1RWH 3 LQ DVVHPEO\ OLQH SRVLWLRQ LQGLFDWHV /HDG )UHH ,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27 &2'( 3$57 180%(5
'$7( &2'( <($5 :((. /,1( &
TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFB/S/SL3004PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
@Y6HQG@) UCDTADTA6IADSG" "G GPUA8P9@A &'( 6TT@H7G@9APIAXXA (A ((& DIAUC@A6TT@H7GAGDI@AA8A DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ @6SA&A2A ((& X@@FA ( GDI@A8
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ QA2A9@TDBI6U@TAG@69AS@@ QSP9V8UAPQUDPI6G @6SA&A2A ((& X@@FA ( 6A2A6TT@H7GATDU@A8P9@
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRFB/S/SL3004PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
UCDTADTA6IADSA$"TAXDUC GPUA8P9@A'!# 6TT@H7G@9APIAXXA!A! DIAUC@A6TT@H7GAGDI@AAGA DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S A$"T 96U@A8P9@ @6SAA2A! X@@FA! GDI@AG
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S A$"T 96U@A8P9@ QA2A9@TDBI6U@TAG@69AAAS@@ QSP9V8UAPQUDPI6G @6SAA2A! X@@FA! 6A2A6TT@H7GATDU@A8P9@
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
IRFB/S/SL3004PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 02/2009
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